Next generation processors will be complemented by high-bandwidth memory designed in partnership with Micron
Intel has revealed additional information about the next generation Xeon Phi chips codenamed ‘Knights Landing’, which are due to appear on the market in the second half of 2015.
Designed for High Performance Computing (HPC) applications, the motherboard-mounted versions of the processor will ship with integrated Omni Scale fabric controllers and up to 16GB of high-bandwidth memory.
Intel hopes that by combining components into easily manageable computing blocks, it can help build smaller and more energy efficient HPC systems, accelerating the rate of scientific discovery.
“Knights Landing will be the first true many-core processor to address today’s memory and I/O performance challenges,” said Charles Wuischpard, vice president and general manager of Workstations and HPC at Intel.
“It will allow programmers to leverage existing code and standard programming models to achieve significant performance gains on a wide set of applications. Its platform design, programming model and balanced performance makes it the first viable step towards exascale.”
The knights are on their way
Knights Landing, built with a 14-nanometer process, will be available as standalone chips mounted directly on the motherboard socket and as PCIe-based cards. Each chip will feature more than 60 Silvermont cores, delivering at least three Teraflops of double-precision performance.
New generation Xeon Phis can be used as either a primary compute processors or as co-processors in conjunction with another host processor, such as the Xeon server CPU. They will be binary-compatible with current Xeon silicon, allowing software developers to reuse the existing code.
According to Intel, 85 percent of all supercomputers on the latest Top500 list are powered by Xeon technology, including China’s ‘Milky Way Two’ – the fastest supercomputer in the world. However, the company is worried that using memory and fabrics as discrete components in servers is limiting the performance and density of HPC infrastructure. The new generation Xeon Phi is meant to address this issue.
The Omni Scale fabric is a high-speed interconnect technology specifically optimised for HPC. It is based on intellectual property acquired from Cray and QLogic, but enjoys application compatibility with Intel’s current True Scale fabric thanks to some in-house alterations.
It will be integrated into the upcoming Xeon Phi chips, as well as some future versions of the 14nm Xeon processors. Omni Scale-based processors, adapter cards and edge switches will also be compatible with Silicon Photonics-based cabling and transceiver solutions.
Another useful addition in Knights Landing is memory – up to 16GB of high-bandwidth, on-package RAM at launch – designed in partnership with Micron. Intel says that this memory can deliver bandwidth that’s four times better than DDR4, while offering five times better energy efficiency and three times more density than current GDDR-based solutions.
By combining the processor, memory and fabric intoa single, independent compute building block, the company hopes to help create a generation of smaller, less complex and more efficient HPC systems.
The processors and Omni Scale fabric controllers will also be available as separate PCIe-based add-on cards for traditional environments.
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