DESIGN AUTOMATION CONFERENCE – Ausdia, the leading developer of design constraints verification and management solutions, introduced a significant enhancement to its SDC platform at the 60th Design Automation Conference (DAC) 2023.
Timevision SC allows constraint developers to both read and write timing constraints in a Spreadsheet format – typically ExcelTM. This empowers users to express their design intentions in a simple, reviewable format, with Timevision automation taking care of the complexities of translation to exact SDC syntax. Users can also export existing SDC to SC (Spreadsheet Constraints) format for simplified review and porting.
“We use Ausdia’s Timevision constraints verification platform on multiple blocks and SoC level for both backend and frontend flow. This helped to improve the constraints quality. As a part of constraints handoff, we use Timevision SC. Ausdia enhanced the constraints management platform with new spreadsheet-based flows,” said Ateet Mishra, Director, SOC Implementation at NXP Semiconductors. “Spreadsheet based constraints methodology is critical for the flow which enables us to maintain, propagate and integrate the constraints throughout RTL to GDSII flow. Also, easy to debug and track the constraints changes,” added Piyush Gaur, Lead Design Engineer at NXP Semiconductors.
Timevision SC is in production currently at several major semiconductor houses, including NXP.
Timevision is a comprehensive timing constraints development, verification and management solution that complements all implementation and timing signoff flows. It has the capacity to handle over 1 billion cells and thousands of clocks. Timevision integrates with all aspects of the design flow and is used before synthesis, before DFT insertion, before place and route, and when signoff timing is being run. Timevision helps designers create good SDC constraints and is a verification platform for existing timing constraints.
Ausdia is highlighting the Timevision platform in booth #2311 at the Design Automation Conference (DAC) at the San Francisco Moscone Convention Center, San Francisco, CA from July 10 – 12, 2023.
About Ausdia
Ausdia delivers standout timing constraint development, verification, and management solutions that complement all implementation and timing signoff flows. The company’s groundbreaking methodology and products give system-on-chip (SoC) and integrated circuit (IC) developers a new way to work, enabling massive productivity gains throughout the design flow. Founded in 2006, the privately held company is headquartered in Sunnyvale, California.
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