IBM Increases Carbon Nanotube Chip Density

Representation of Nanotubes. Credit - UMD

IBM researchers develop techniques that pack more than 10,000 working carbon nanotube transistors onto a single chip

IBM has successfully packed more than 10,000 working transistors made of carbon nanotubes onto a single chip, using standard semiconductor processes, paving the way for commercial fabrication of nanotube-based computer chips.

The experiment, detailed in a Nature Nanotechnology article published on Sunday, is the first time such a high density of carbon nanotube transistors has been placed on a wafer, IBM said.

Previously scientists have been able to place, at most, a few hundred carbon nanotube devices at a time, the company said. IBM estimates more than one billion such transistors will be needed for the creation of commercial chips.

Technical problems solved

IBM said the newly-demonstrated techniques move toward solving two technical problems that stand in the way of the mass-production of carbon nanotube-based processors: the high purity of the nanotubes and their placement at predetermined substrate positions on the wafer.

“Carbon nanotubes, borne out of chemistry, have largely been laboratory curiosities as far as microelectronic applications are concerned,” said Supratik Guha, director of physical sciences at IBM Research. “We are attempting the first steps towards a technology by fabricating carbon nanotube transistors within a conventional wafer fabrication infrastructure.”

Carbon nanotubes naturally occur in metallic and semiconducting species, but only the semiconducting nanotubes can be used in the manufacture of electronic circuits, and these must be placed precisely on the wafer.

The method developed by IBM’s researchers uses ion-exchange chemistry to allow the controlled placement of individual nanotubes on a substrate at a density of about one billion per square centimetre, two orders of magnitude greater than attained by previous experiments.

Initially the nanotubes are mixed with a surfactant, which makes them soluble in water. After this a substrate comprised of silicon oxide (SiO2) with trenches made of chemically modified hafnium oxide (HfO2) is immersed in the solution and the desired nanotubes attach via a chemical bond to the HfO2 trenches.

Mass fabrication

IBM’s researchers were able to fabricate more than 10,000 transistors on a single chip. The tech giant claimed rapid testing of thousands of devices is possible using tools compatible with standard commercial processes.

IBM said the new technique can be readily implemented using common chemicals and existing semiconductor fabrication infrastructure.

In January, IBM said it had developed a 9nm carbon nanotube transistor (CNT), the smallest ever produced and reaching beyond the 11nm constraints imposed by silicon. More significantly, the power consumption of the CNT is lower than a silicon chip – it is capable of switching at very low voltages (0.5V) – and can carry four times as much current, IBM said.

In April, scientists at the University of Maryland (UMD) discovered a counter-intuitive property of carbon nanotubes which could allow the increase of processor speeds without overheating. The team found that when an electrical current was passed through a CNT, a surrounding substrate heated up while the nanotubes remained cool, a phenomenon contrary to what is normally experienced with the Joule heating effect.

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