AMD is to use the Hot Chips Conference at Stanford University to discuss the technical details of its “Bobcat” and “Bulldozer” processors
Advanced Micro Devices is to unveil the technical details of two new microprocessors, “Bulldozer” and “Bobcat,” during the Hot Chips conference at Stanford University.
It’s the first time in nearly seven years that AMD has updated the microarchitecture of processing cores.
At Hot Chips, which starts 24 August, AMD engineers plan to detail the design of Bulldozer, which is geared toward server systems and high-end desktops and workstations, and Bobcat, a microprocessor core design for laptops and other portable devices.
In addition to detailing new microarchitecture, these two new processing cores represent a major step for AMD as the company looks to transform itself from a traditional chip company that both designed and manufactured processors to a business that focuses solely on design. In 2009, AMD officially spun off its manufacturing division into a new business now called Global Foundries.
Right now, AMD remains a distant second to Intel in the worldwide x86 processors market. However, the company has managed to stabilise its finances and its market position against a much larger competitor. Bulldozer and Bobcat represent the next big step in the company’s evolution.
Samples of Bobcat and Bulldozer chips should begin shipping to AMD’s OEM partners by later this year with the first actual processors hitting the market by early 2011. The Bulldozer chips are backward-compatible to AMD’s current socket family. While AMD engineers are detailing the technical components of these two chips at the Hot Chips conference, the company is not revealing any information about clock speed, pricing or specific release dates.
Server Focused Bulldozer
The first and more complicated of the new microarchitectures is Bulldozer, which promises to deliver 33 percent more cores and a 50 percent increase in throughput compared to AMD’s current 12-core Opteron 6100, previously codenamed Magny-Cours. Bulldozer, which is being built with 32-nanometer manufacturing, also promises better energy efficiency.
AMD has already revealed that Bulldozer supports up to 256-bit floating point execution, which is important for high-performance computing applications. However, Dina McKinney, an AMD vice president for design engineering, said the company wanted to combine two different chip technologies with Bulldozer.
While most high-performance chips use either SMT (simultaneous multithreading), which places two instructional threads on one core to allow for two tasks to execute at the same, or CMP (core multiprocessing), which essentially just increases the core count, Bulldozer combines both techniques.
By finding a third way, AMD hopes to increase performance and reduce power while keeping the chips’ clock speeds at their current levels.
“Bulldozer takes SMT and CMP and combines the best of both techniques, while addressing the shortcomings of both,” said McKinney. “It has dedicated execution cores, register sets, easy and predictable system performance and integration with the symmetrical cores. The two strong threads have dedicated hardware and that really bears the bulk of the workload.”